26 #include "sidplayfp/sidendian.h"
27 #include "sidplayfp/siddefs.h"
28 #include "sidplayfp/sidmemory.h"
30 #include "Banks/Bank.h"
31 #include "Banks/IOBank.h"
32 #include "Banks/SystemRAMBank.h"
33 #include "Banks/SystemROMBanks.h"
34 #include "Banks/ZeroRAMBank.h"
47 bool loram, hiram, charen;
53 Bank* cpuWriteMap[16];
73 void setCpuPort(
int state);
74 void updateMappingPHI2();
75 uint8_t getLastReadByte()
const {
return 0; }
76 event_clock_t getPhi2Time()
const {
return context.
getTime(EVENT_CLOCK_PHI2); }
84 void setRoms(
const uint8_t* kernal,
const uint8_t* basic,
const uint8_t* character)
86 kernalRomBank.set(kernal);
87 basicRomBank.set(basic);
88 characterRomBank.
set(character);
93 uint_least16_t
readMemWord(uint_least16_t addr) {
return endian_little16(ramBank.array()+addr); }
96 void writeMemWord(uint_least16_t addr, uint_least16_t value) { endian_little16(ramBank.array()+addr, value); }
98 void fillRam(uint_least16_t start, uint8_t value,
unsigned int size)
100 memset(ramBank.array()+start, value, size);
102 void fillRam(uint_least16_t start,
const uint8_t* source,
unsigned int size)
104 memcpy(ramBank.array()+start, source, size);
120 uint8_t
cpuRead(uint_least16_t addr)
const {
return cpuReadMap[addr >> 12]->
peek(addr); }
128 void cpuWrite(uint_least16_t addr, uint8_t data) { cpuWriteMap[addr >> 12]->
poke(addr, data); }